There have been known component-embedded substrates having electric or electronic components embedded therein (see Patent Document 1, for example). A component-embedded substrate as typified by the one disclosed in Patent Document 1 is fabricated by laminating an electrically insulating base such as a prepreg on a component, and then partly removing an outside electrically conductive layer by etching or the like, to form a conductor pattern. When the pattern is to be formed, however, difficulty arises in aligning the pattern with the terminals of the component. Thus, using an electrically conductive substance such as copper, a mark is formed on a core substrate, which is an insulating base with a hole permitting the component to be inserted therein, and the core substrate is subjected to lamination along with the component. The buried mark is detected by means of X rays to form a through hole passing through the mark, and a conductor pattern is formed using the through hole as a reference, to improve the positional accuracy of the conductor pattern. However, forming a mark on the core substrate requires the same amount of labor as forming an ordinary conductor pattern, and also an additional process needs to be performed for that purpose.
There has also been known a method in which a hole is formed beforehand in an electrically conductive layer such as a copper foil, a solder resist is formed using the hole as a reference, X-ray hole cutting is performed following lamination by using the hole as a reference, a guide hole is formed using the X rays-cut hole as a reference, and a conductor pattern is formed using the guide hole as a reference, to improve positional accuracy. This method, however, involves multiple processes performed using different holes as reference positions, and actual positional accuracy is low. In practice, moreover, the resin of prepreg flows into the hole formed in the conductive layer, making it difficult to fabricate a satisfactory substrate.